Saturday, November 9, 2013

Intel Secret Underground Laboratory

Intel Secret Underground Laboratory

8 November 2013
Intel Secret Underground Laboratory
A sends:
J wrote:
> ...
> It has been about 31 years since I worked at Intel; at the time they were
> developing the first DRAMs with 'redundancy': The ability to swap out
> 'rows' and 'columns', or potentially blocks, of storage elements. This was
> done to be able to drastically increase the yield of such chips: Test
> programs were written to identify errors (single bits; bad rows; bad
> columns; bad blocks) and swap out with 'invisible' rows/columns/blocks with
> others. Presumably, modern flash ROM has long used similar abilities. If
> that is the case, there is some kind of ordinarily-invisible storage areas
> (blocks, most likely) in those flash-drives. Such areas were sometimes
> 'activated' (made to appear/disappear) by out-of-spec voltages (above +5
> volts), but it's possible also that reading or 'writing' combinations of
> pre-specified data would also do this. It's been too long for me to give
> detailed assistance, but I can well imagine that 'they' are taking advantage
> of such 'features'.
Intel would be a strange beast for you today J.
There's a secret underground facility in Oregon (perhaps Cali too) for
classified intelligence work. some small fraction of Intel employees even
know it exists.
There they sequester CPU vulnerability research of sufficient implication.
There they sequester hardware level exploitation research of sufficient
implication. There they work on TS/SCI compartmented projects for USGOV.
45.545981, -122.962680
Hillsboro, OR
To the east, power (and interesting perimeter controls)
To the west, underground TS facilities accessed via underground
tunnel under parking to main complex.

Intel Secret Underground Laboratory

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